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d a t a sh eet product speci?cation 2003 nov 17 discrete semiconductors BF1206 dual n-channel dual-gate mos-fet a ndbook, halfpage mbd128
2003 nov 17 2 philips semiconductors product speci?cation dual n-channel dual-gate mos-fet BF1206 features two low noise gain controlled amplifiers in a single package superior cross-modulation performance during agc high forward transfer admittance high forward transfer admittance to input capacitance ratio. applications gain controlled low noise amplifiers for vhf and uhf applications with 5 v supply voltage, such as digital and analog television tuners. description the BF1206 is a combination of two different dual gate mos-fet amplifiers with shared source and gate 2 leads. the source and substrate are interconnected. internal bias circuits enable dc stabilization and a very good cross-modulation performance during agc. integrated diodes between the gates and source protect against excessive input voltage surges. the transistor is encapsulated in sot363 micro-miniature plastic package. pinning - sot363 pin description 1 drain (b) 2 source 3 gate 1 (b) 4 gate 1 (a) 5 gate 2 6 drain (a) handbook, halfpage 123 654 top view mam480 amp a d (a) g2 g1 (a) d (b) s g1 (b) amp b fig.1 simplified outline and symbol. marking code: l6-. quick reference data symbol parameter conditions min. typ. max. unit per mos-fet; unless otherwise speci?ed v ds drain-source voltage -- 6v i d drain current (dc) -- 30 ma ? y fs ? forward transfer admittance amp. a: i d =18ma 333848 ms amp. b: i d =12ma 293444 ms c ig1-s input capacitance at gate 1 amp. a: i d = 18 ma; f = 1 mhz - 2.4 2.9 pf amp. b: i d = 12 ma; f = 1 mhz - 1.7 2.2 pf c rss reverse transfer capacitance f = 1 mhz - 15 - ff x mod cross-modulation amp. a: input level for k = 1% at 40 db agc 102 105 - db m v amp. b: input level for k = 1% at 40 db agc 100 103 - db m v nf noise ?gure amp. a: f = 400 mhz; i d =18ma - 1.3 1.9 db amp. b: f = 800 mhz; i d =12ma - 1.4 2.0 db amp. a: f = 11 mhz; i d =18ma - 3 - db amp. b: f = 11 mhz; i d =12ma - 3.5 - db
2003 nov 17 3 philips semiconductors product speci?cation dual n-channel dual-gate mos-fet BF1206 ordering information limiting values in accordance with the absolute maximum rating system (iec 60134). note 1. t s is the temperature at the soldering point of the source lead. thermal characteristics caution this product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport and handling. for further information, refer to philips specs.: snw-eq-608, snw-fq-302a and snw-fq-302b. type number package name description version BF1206 - plastic surface mounted package; 6 leads sot363 symbol parameter conditions min. max. unit per mos-fet; unless otherwise speci?ed v ds drain-source voltage - 6v i d drain current (dc) - 30 ma i g1 gate 1 current - 10 ma i g2 gate 2 current - 10 ma p tot total power dissipation t s 107 c; note 1 - 180 mw t stg storage temperature - 65 +150 c t j junction temperature - 150 c symbol parameter value unit r th j-s thermal resistance from junction to soldering point 240 k/w
2003 nov 17 4 philips semiconductors product speci?cation dual n-channel dual-gate mos-fet BF1206 handbook, halfpage 050 t s ( c) p tot (mw) 100 200 200 150 50 0 100 150 mle257 fig.2 power derating curve. static characteristics t j =25 c unless otherwise speci?ed. note 1. r g1 connects gate 1 to v gg =5v. symbol parameter conditions min. max. unit per mos-fet unless otherwise speci?ed v (br)dss drain-source breakdown voltage v g1-s =v g2-s = 0; i d =10 m a6 - v v (br)g1-ss gate-source breakdown voltage v gs =v ds = 0; i g1-s =10ma 6 10 v v (br)g2-ss gate-source breakdown voltage v gs =v ds = 0; i g2-s =10ma 6 10 v v (f)s-g1 forward source-gate voltage v g2-s =v ds = 0; i s-g1 = 10 ma 0.5 1.5 v v (f)s-g2 forward source-gate voltage v g1-s =v ds = 0; i s-g2 = 10 ma 0.5 1.5 v v g1-s(th) gate-source threshold voltage v ds =5v; v g2-s =4v; i d = 100 m a 0.3 1 v v g2-s(th) gate-source threshold voltage v ds =5v; v g1-s =5v; i d = 100 m a 0.35 1 v i dsx drain-source current amp. a: v g2-s =4v; v ds =5v; r g =91k w; note 1 14 23 ma amp. b: v g2-s =4v; v ds =5v; r g = 150 k w; note 1 917ma i g1-s gate cut-off current v g1-s =5v; v g2-s =v ds =0 - 50 na i g2-s gate cut-off current v g2-s =5v; v g1-s =v ds =0 - 20 na
2003 nov 17 5 philips semiconductors product speci?cation dual n-channel dual-gate mos-fet BF1206 dynamic characteristics amplifier a common source; t amb =25 c; v g2-s =4v; v ds =5v; i d = 18 ma; unless otherwise speci?ed. notes 1. calculated from measured s-parameters. 2. measured in fig.35 test circuit. symbol parameter conditions min. typ. max. unit ? y fs ? forward transfer admittance pulsed; t j =25 c 333848ms c ig1-ss input capacitance at gate 1 f = 1 mhz - 2.4 2.9 pf c ig2-ss input capacitance at gate 2 f = 1 mhz - 3.2 - pf c oss output capacitance f = 1 mhz - 1.1 - pf c rss reverse transfer capacitance f = 1 mhz - 15 30 ff nf noise ?gure f = 11 mhz; g s = 20 ms; b s =0 - 3 - db f = 400 mhz; y s =y s opt - 1.3 1.9 db f = 800 mhz; y s =y s opt - 1.6 2.2 db g tr power gain f = 200 mhz; g s = 2 ms; b s =b s opt ; g l = 0.5 ms; b l =b l opt ; note 1 - 35 - db f = 400 mhz; g s = 2 ms; b s =b s opt ; g l = 1 ms; b l =b l opt ; note 1 - 30 - db f = 800 mhz; g s = 3.3 ms; b s =b s opt ; g l = 1 ms; b l =b l opt ; note 1 - 23 - db x mod cross-modulation input level for k = 1%; f w = 50 mhz; f unw = 60 mhz; note 2 at 0 db agc 90 -- db m v at 10 db agc - 92 - db m v at 40 db agc 102 105 - db m v
2003 nov 17 6 philips semiconductors product speci?cation dual n-channel dual-gate mos-fet BF1206 graphs for amplifier a handbook, halfpage 0 0.5 1 2 v g1-s (v) i d (ma) 30 0 10 20 1.5 mle258 (7) (6) (5) (4) (1) (2) (3) fig.3 transfer characteristics; typical values; amplifier a. v ds = 5 v; t j =25 c. (1) v g2-s =4v. (2) v g2-s = 3.5 v. (3) v g2-s =3v. (4) v g2-s = 2.5 v. (5) v g2-s =2v. (6) v g2-s = 1.5 v. (7) v g2-s =1v. handbook, halfpage 024 v ds (v) i d (ma) 6 32 24 8 0 16 mle259 (1) (2) (3) (4) (5) (6) (7) fig.4 output characteristics; typical values; amplifier a. v g2-s = 4 v; t j =25 c. (1) v g1-s = 1.5 v. (2) v g1-s = 1.4 v. (3) v g1-s = 1.3 v. (4) v g1-s = 1.2 v. (5) v g1-s = 1.1 v. (6) v g1-s =1v. (7) v g1-s = 0.9 v.
2003 nov 17 7 philips semiconductors product speci?cation dual n-channel dual-gate mos-fet BF1206 handbook, halfpage 0 v g1-s (v) i g1 ( m a) 0.5 1 2 100 0 80 1.5 60 40 20 mle260 (6) (7) (4) (3) (2) (1) (5) fig.5 gate 1 current as a function of gate 1 voltage; typical values; amplifier a. v ds = 5 v; t j =25 c. (1) v g2-s =4v. (2) v g2-s = 3.5 v. (3) v g2-s =3v. (4) v g2-s = 2.5 v. (5) v g2-s =2v. (6) v g2-s = 1.5 v. (7) v g2-s =1v. handbook, halfpage 010 i d (ma) 20 30 50 0 40 30 20 1 mle261 (1) (2) (3) (4) (5) (7) (6) y fs (ms) fig.6 forward transfer admittance as a function of drain current; typical values; amplifier a. v ds = 5 v; t j =25 c. (1) v g2-s =4v. (2) v g2-s = 3.5 v. (3) v g2-s =3v. (4) v g2-s = 2.5 v. (5) v g2-s =2v. (6) v g2-s = 1.5 v. (7) v g2-s =1v. handbook, halfpage 0 24 16 8 0 10 50 20 30 40 mle262 i g1 ( m a) i d (ma) fig.7 drain current as a function of gate 1 current; typical values; amplifier a. v ds = 5 v; v g2-s = 4 v; t j =25 c. handbook, halfpage 05 20 0 4 8 12 16 1 i d (ma) v gg (v) 234 mle263 fig.8 drain current as a function of gate 1 supply voltage (v gg ); typical values; amplifier a. v ds = 5 v; v g2-s = 4 v; t j =25 c. r g1 =91k w (connected to v gg ); see fig.35.
2003 nov 17 8 philips semiconductors product speci?cation dual n-channel dual-gate mos-fet BF1206 handbook, halfpage 02 (1) (2) (3) (5) (7) 3 v gg = v ds (v) i d (ma) 8 40 0 32 6 24 16 8 mle288 (4) (6) fig.9 drain current as a function of gate 1 (v gg ) and drain supply voltage; typical values; amplifier a. v g2-s = 4 v; t j =25 c; r g1 = 150 k w (connected to v gg ); see fig.35. (1) r g1 =56k w . (2) r g1 =68k w . (3) r g1 =82k w . (4) r g1 =91k w . (5) r g1 = 100 k w . (6) r g1 = 120 k w . (7) r g1 = 150 k w . handbook, halfpage 02 v g2-s (v) i d (ma) 46 20 0 16 12 8 4 mle292 (1) (4) (5) (3) (2) fig.10 drain current as a function of gate 2 voltage; typical values; amplifier a. v ds = 5 v; t j =25 c; r g1 =91k w (connected to v gg ); see fig.35. (1) v gg =5v. (2) v gg = 4.5 v. (3) v gg =4v. (4) v gg = 3.5 v. (5) v gg =3v.
2003 nov 17 9 philips semiconductors product speci?cation dual n-channel dual-gate mos-fet BF1206 handbook, halfpage 02 v g2-s (v) i g1 ( m a) 46 50 0 40 30 20 1 mle264 (1) (2) (3) (4) (5) fig.11 gate 1 current as a function of gate 2 voltage; typical values; amplifier a. v ds 5 v; t j =25 c. r g1 =91k w (connected to v gg ); see fig.35. (1) v gg =5v. (2) v gg = 4.5 v. (3) v gg =4v. (4) v gg = 3.5 v. (5) v gg =3v. handbook, halfpage 010 50 120 110 90 80 100 20 gain reduction (db) v unw (db m v) 30 40 mle266 fig.12 unwanted voltage for 1% cross-modulation as a function of gain reduction; typical values; amplifier a. v ds = 5 v; v gg = 5 v; r g1 =91k w ; f = 50 mhz; f unw = 60 mhz; t amb =25 c; see fig.35. handbook, halfpage 012 v agc (v) gain reduction (db) 4 0 - 50 - 10 3 - 20 - 30 - 40 mle265 fig.13 typical gain reduction as a function of agc voltage; typical values; amplifier a. v ds = 5 v; v gg = 5 v; r g1 =91k w ; f = 50 mhz; t amb =25 c; see fig.35. handbook, halfpage 050 24 0 8 16 10 i d (ma) gain reduction (db) 20 30 40 mle267 fig.14 drain current as a function of gain reduction; typical values; amplifier a. v ds = 5 v; v gg = 5 v; r g1 =91k w ; f = 50 mhz; t amb =25 c; see fig.35.
2003 nov 17 10 philips semiconductors product speci?cation dual n-channel dual-gate mos-fet BF1206 handbook, halfpage mle268 10 f (mhz) y is (ms) 10 2 10 3 10 2 10 1 10 - 1 b is g is fig.15 input admittance as a function of frequency; typical values; amplifier a. v ds = 5 v; v g2 = 4 v; i d = 18 ma; t amb =25 c. handbook, halfpage mle269 10 f (mhz) 10 2 10 3 10 3 10 2 10 1 - 10 3 - 10 2 - 10 - 1 j rs (deg) y rs ( m s) y rs j rs fig.16 reverse transfer admittance and phase as a function of frequency; typical values; amplifier a. v ds = 5 v; v g2 = 4 v; i d = 18 ma; t amb =25 c. handbook, halfpage 10 1 10 2 mle270 10 f (mhz) 10 3 10 2 - 10 2 - 10 - 1 j fs (deg) y fs (ms) y fs -j fs fig.17 forward transfer admittance and phase as a function of frequency; typical values; amplifier a. v ds = 5 v; v g2 = 4 v; i d = 18 ma; t amb =25 c. handbook, halfpage mle271 10 f (mhz) y os (ms) 10 2 10 3 10 1 10 - 2 10 - 1 b os g os fig.18 output admittance as a function of frequency; typical values; amplifier a. v ds = 5 v; v g2 = 4 v; i d = 18 ma; t amb =25 c.
2003 nov 17 11 philips semiconductors product speci?cation dual n-channel dual-gate mos-fet BF1206 ampli?er a scattering parameters v ds =5v; v g2-s =4v; i d = 18 ma; t amb =25 c noise data v ds =5v; v g2-s =4v; i d = 18 ma; t amb =25 c f (mhz) s 11 s 21 s 12 s 22 magnitude (ratio) angle (deg) magnitude (ratio) angle (deg) magnitude (ratio) angle (deg) magnitude (ratio) angle (deg) 50 0.988 - 4.62 3.72 174.72 0.0008 86.73 0.991 - 2.07 100 0.984 - 9.23 3.71 169.42 0.0015 84.39 0.989 - 4.16 200 0.971 - 18.33 3.66 159.05 0.0029 79.96 0.986 - 8.24 300 0.951 - 27.32 3.58 148.77 0.0038 76.62 0.980 - 12.32 400 0.926 - 36.04 3.47 138.74 0.0044 74.42 0.973 - 16.33 500 0.896 - 44.50 3.36 129.05 0.0046 74.84 0.965 - 20.25 600 0.865 - 52.63 3.23 119.67 0.0043 79.73 0.958 - 24.20 700 0.832 - 60.47 3.09 110.43 0.0038 92.63 0.951 - 28.14 800 0.797 - 67.66 2.91 101.40 0.0028 118.47 0.937 - 32.14 900 0.769 - 75.01 2.83 93.09 0.0051 146.61 0.940 - 35.76 1000 0.732 - 81.73 2.67 84.05 0.0071 159.78 0.937 - 39.86 f (mhz) f min (db) g opt r n ( w ) (ratio) (deg) 400 1.3 0.618 22.7 26.7 800 1.6 0.593 44.1 29.7
2003 nov 17 12 philips semiconductors product speci?cation dual n-channel dual-gate mos-fet BF1206 dynamic characteristics amplifier b common source; t amb =25 c; v g2-s =4v; v ds =5v; i d = 12 ma; unless otherwise speci?ed. notes 1. calculated from measured s-parameters. 2. measured in fig.35 test circuit. symbol parameter conditions min. typ. max. unit ? y fs ? forward transfer admittance pulsed; t j =25 c 293444ms c ig1-ss input capacitance at gate 1 f = 1 mhz - 1.7 2.2 pf c ig2-ss input capacitance at gate 2 f = 1 mhz - 4.2 - pf c oss output capacitance f = 1 mhz - 0.85 - pf c rss reverse transfer capacitance f = 1 mhz - 15 30 ff f noise ?gure f = 11 mhz; g s = 20 ms; b s =0 - 3.5 - db f = 400 mhz; y s =y s opt - 1.3 1.9 db f = 800 mhz; y s =y s opt - 1.4 2 db g tr power gain f = 200 mhz; g s = 2 ms; b s =b s opt ; g l = 0.5 ms; b l =b l opt ; note 1 - 35 - db f = 400 mhz; g s = 2 ms; b s =b s opt ; g l = 1 ms; b l =b l opt ; note 1 - 31 - db f = 800 mhz; g s = 3.3 ms; b s =b s opt ; g l = 1 ms; b l =b l opt ; note 1 - 27 - db x mod cross-modulation input level for k = 1%; f w = 50 mhz; f unw = 60 mhz; note 2 at 0 db agc 90 -- db m v at 10 db agc - 90 - db m v at 40 db agc 100 103 - db m v
2003 nov 17 13 philips semiconductors product speci?cation dual n-channel dual-gate mos-fet BF1206 graphs for amplifier b handbook, halfpage 0 0.5 1 2 v g1-s (v) i d (ma) 30 0 10 20 1.5 mle272 (7) (6) (5) (4) (1) (2) (3) fig.19 transfer characteristics; typical values; amplifier b. v ds = 5 v; t j =25 c. (1) v g2-s =4v. (2) v g2-s = 3.5 v. (3) v g2-s =3v. (4) v g2-s = 2.5 v. (5) v g2-s =2v. (6) v g2-s = 1.5 v. (7) v g2-s =1v. handbook, halfpage 02 i d (ma) 4 v ds (v) 6 32 24 8 0 16 mle273 (1) (2) (3) (4) (5) (6) (7) fig.20 output characteristics; typical values; amplifier b. v g2-s = 4 v; t j =25 c. (1) v g1-s = 1.5 v. (2) v g1-s = 1.4 v. (3) v g1-s = 1.3 v. (4) v g1-s = 1.2 v. (5) v g1-s = 1.1 v. (6) v g1-s =1v. (7) v g1-s = 0.9 v.
2003 nov 17 14 philips semiconductors product speci?cation dual n-channel dual-gate mos-fet BF1206 handbook, halfpage 0 v g1-s (v) i g1 ( m a) 0.5 1 2 100 0 80 1.5 60 40 20 mle274 (6) (7) (3) (4) (2) (1) (5) fig.21 gate 1 current as a function of gate 1 voltage; typical values; amplifier b. v ds = 5 v; t j =25 c. (1) v g2-s =4v. (2) v g2-s = 3.5 v. (3) v g2-s =3v. (4) v g2-s = 2.5 v. (5) v g2-s =2v. (6) v g2-s = 1.5 v. (7) v g2-s =1v. handbook, halfpage 010 i d (ma) 20 30 50 0 40 30 20 10 mle275 (2) (3) (1) (4) (5) (7) (6) y fs (ms) fig.22 forward transfer admittance as a function of drain current; typical values; amplifier b. v ds = 5 v; t j =25 c. (1) v g2-s =4v. (2) v g2-s = 3.5 v. (3) v g2-s =3v. (4) v g2-s = 2.5 v. (5) v g2-s =2v. (6) v g2-s = 1.5 v. (7) v g2-s =1v. handbook, halfpage 0 24 16 8 0 10 50 20 30 40 mle276 i g1 ( m a) i d (ma) fig.23 drain current as a function of gate 1 current; typical values; amplifier b. v ds = 5 v; v g2-s = 4 v; t j =25 c. handbook, halfpage 05 12 0 4 8 1 i d (ma) v gg (v) 234 mle277 fig.24 drain current as a function of gate 1 supply voltage (v gg ); typical values; amplifier b. v ds = 5 v; v g2-s = 4 v; t j =25 c. r g1 = 150 k w (connected to v gg ); see fig.35.
2003 nov 17 15 philips semiconductors product speci?cation dual n-channel dual-gate mos-fet BF1206 handbook, halfpage 02 (1) (2) (3) (4) (5) (6) (7) 48 v gg = v ds (v) i d (ma) 24 0 8 16 6 mle278 fig.25 drain current as a function of gate 1 (v gg ) and drain supply voltage; typical values; amplifier b. v g2-s = 4 v; t j =25 c. r g1 = 150 k w (connected to v gg ); see fig.35. (1) r g1 = 270 k w . (2) r g1 = 220 k w . (3) r g1 = 180 k w . (4) r g1 = 150 k w . (5) r g1 = 120 k w . (6) r g1 = 100 k w . (7) r g1 =82k w . handbook, halfpage 02 (1) (2) (3) (4) (5) 4 v g2-s (v) i d (ma) 6 16 12 4 0 8 mle279 fig.26 drain current as a function of gate 2 voltage; typical values; amplifier b. v ds = 5 v; t j =25 c. r g1 = 150 k w (connected to v gg ); see fig.35. (1) v gg =5v. (2) v gg = 4.5 v. (3) v gg =4v. (4) v gg = 3.5 v. (5) v gg =3v.
2003 nov 17 16 philips semiconductors product speci?cation dual n-channel dual-gate mos-fet BF1206 handbook, halfpage 0 30 20 10 0 2 (1) (2) (3) (4) (5) 46 mle280 v g2-s (v) i g1 ( m a) fig.27 gate 1 current as a function of gate 2 voltage; typical values; amplifier b. v ds 5 v; t j =25 c. r g1 = 150 k w (connected to v gg ); see fig.35. (1) v gg =5v. (2) v gg = 4.5 v. (3) v gg =4v. (4) v gg = 3.5 v. (5) v gg =3v. handbook, halfpage 010 50 120 110 90 80 100 20 gain reduction (db) v unw (db m v) 30 40 mle282 fig.28 unwanted voltage for 1% cross-modulation as a function of gain reduction; typical values; amplifier b. v ds = 5 v; v gg = 5 v; r g1 = 150 k w ; f = 50 mhz; f unw = 60 mhz; t amb =25 c; see fig.35. handbook, halfpage 012 v agc (v) gain reduction (db) 4 0 - 50 - 10 3 - 20 - 30 - 40 mle281 fig.29 typical gain reduction as a function of agc voltage; typical values; amplifier b. v ds = 5 v; v gg = 5 v; r g1 = 150 k w ; f = 50 mhz; t amb =25 c; see fig.35. handbook, halfpage 010 50 16 12 4 0 8 20 gain reduction (db) i d (ma) 30 40 mle283 fig.30 drain current as a function of gain reduction; typical values; amplifier b. v ds = 5 v; v gg = 5 v; r g1 = 150 k w ; f = 50 mhz; t amb =25 c; see fig.35.
2003 nov 17 17 philips semiconductors product speci?cation dual n-channel dual-gate mos-fet BF1206 handbook, halfpage 10 2 10 1 10 - 1 10 - 2 mle284 10 10 2 10 3 f (mhz) y is (ms) b is g is fig.31 input admittance as a function of frequency; typical values; amplifier b. v ds = 5 v; v g2 = 4 v; i d = 12 ma; t amb =25 c. handbook, halfpage mle285 10 f (mhz) 10 2 10 3 10 3 10 2 10 1 - 10 3 - 10 2 - 10 - 1 j rs (deg) y rs ( m s) y rs j rs fig.32 reverse transfer admittance and phase as a function of frequency; typical values; amplifier b. v ds = 5 v; v g2 = 4 v; i d = 12 ma; t amb =25 c. handbook, halfpage 10 1 10 2 mle286 10 f (mhz) 10 3 10 2 - 10 2 - 10 - 1 j fs (deg) y fs (ms) y fs -j fs fig.33 forward transfer admittance and phase as a function of frequency; typical values; amplifier b. v ds = 5 v; v g2 = 4 v; i d = 12 ma; t amb =25 c. handbook, halfpage mle287 10 f (mhz) y os (ms) 10 2 10 3 10 2 10 1 10 - 1 b os g os fig.34 output admittance as a function of frequency; typical values; amplifier b. v ds = 5 v; v g2 = 4 v; i d = 12 ma; t amb =25 c.
2003 nov 17 18 philips semiconductors product speci?cation dual n-channel dual-gate mos-fet BF1206 ampli?er b scattering parameters v ds =5v; v g2-s =4v; i d = 12 ma; t amb =25 c noise data v ds = 5 v; v g2-s = 4 v; i d = 12 ma; t amb =25 c f (mhz) s 11 s 21 s 12 s 22 magnitude (ratio) angle (deg) magnitude (ratio) angle (deg) magnitude (ratio) angle (deg) magnitude (ratio) angle (deg) 50 0.991 - 3.43 3.44 176.33 0.0008 86.54 0.988 - 1.69 100 0.989 - 6.84 3.43 172.66 0.0015 84.92 0.987 - 3.38 200 0.982 - 13.61 3.41 165.44 0.0029 80.95 0.985 - 6.72 300 0.973 - 20.37 3.38 158.20 0.0041 77.63 0.982 - 10.08 400 0.961 - 27.05 3.34 151.04 0.0051 74.43 0.978 - 13.46 500 0.947 - 33.68 3.29 144.02 0.0058 71.86 0.973 - 16.83 600 0.933 - 40.17 3.23 137.12 0.0062 70.28 0.969 - 20.25 700 0.919 - 46.54 3.16 130.22 0.0063 70.72 0.965 - 23.68 800 0.905 - 52.86 3.09 123.22 0.0065 72.37 0.960 - 27.22 900 0.890 - 58.60 3.02 116.84 0.0055 75.91 0.958 - 30.57 1000 0.881 - 64.34 2.94 110.20 0.0058 89.82 0.958 - 34.14 f (mhz) f min (db) g opt r n ( w ) (ratio) (deg) 400 1.3 0.648 14.4 28.8 800 1.4 0.604 31.1 27.9 handbook, full pagewidth dut c1 4.7 nf r1 10 k w mgs315 c4 4.7 nf l1 ? 2.2 m h c3 4.7 nf r l 50 w v gg v agc v ds r gen 50 w v i r2 50 w 4.7 nf c2 r g1 fig.35 cross-modulation test set-up (for one mos-fet).
2003 nov 17 19 philips semiconductors product speci?cation dual n-channel dual-gate mos-fet BF1206 package outline references outline version european projection issue date iec jedec eiaj sot363 sc-88 wb m b p d e 1 e pin 1 index a a 1 l p q detail x h e e v m a a b y 0 1 2 mm scale c x 13 2 4 5 6 plastic surface mounted package; 6 leads sot363 unit a 1 max b p cd e e 1 h e l p qy w v mm 0.1 0.30 0.20 2.2 1.8 0.25 0.10 1.35 1.15 0.65 e 1.3 2.2 2.0 0.2 0.1 0.2 dimensions (mm are the original dimensions) 0.45 0.15 0.25 0.15 a 1.1 0.8 97-02-28
2003 nov 17 20 philips semiconductors product speci?cation dual n-channel dual-gate mos-fet BF1206 data sheet status notes 1. please consult the most recently issued data sheet before initiating or completing a design. 2. the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the latest information is available on the internet at url http://www.semiconductors.philips.com. 3. for data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. level data sheet status (1) product status (2)(3) definition i objective data development this data sheet contains data from the objective speci?cation for product development. philips semiconductors reserves the right to change the speci?cation in any manner without notice. ii preliminary data quali?cation this data sheet contains data from the preliminary speci?cation. supplementary data will be published at a later date. philips semiconductors reserves the right to change the speci?cation without notice, in order to improve the design and supply the best possible product. iii product data production this data sheet contains data from the product speci?cation. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. relevant changes will be communicated via a customer product/process change noti?cation (cpcn). definitions short-form specification ? the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition ? limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information ? applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. disclaimers life support applications ? these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes ? philips semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. when the product is in full production (status production), relevant changes will be communicated via a customer product/process change notification (cpcn). philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
? koninklijke philips electronics n.v. 2003 sca75 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. philips semiconductors C a worldwide company contact information for additional information please visit http://www.semiconductors.philips.com . fax: +31 40 27 24825 for sales of?ces addresses send e-mail to: sales.addresses@www.semiconductors.philips.com . printed in the netherlands r77 20p/01/pp 21 date of release: 2003 nov 17 document order number: 9397 750 12005

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